Test Vision Symposium

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Wednesday, Jul 13
9:00am – 5:00pm

Test Vision Symposium - Test's Role in Uniting the Industry (Day 1 of 2)
Location: South Hall, Level 3, Room 302
Moderator: John Shelley – Teradyne
Moderator: Jeorge S. Hurtarte, PhD, MBA – Lam Research
Speaker: Alan Liao – FormFactor
Moderator: Paul Berndt – Microsoft Corporation
Keynote Speaker: Mark Roos, MSEE, MBA – Roos Instruments
Session Moderator: Alan Liao – FormFactor
Speaker: Adrian Kwan – Advantest
Speaker: Ryan Garrison, PMP – FormFactor
Speaker: Roger C. Nettles, Jr., MSEE – Advantest
Speaker: Brian C. Wadell, MEng EE – Teradyne
Session Moderator: Stuart Pearce – AEM
Speaker: Luca Fanelli, MA – SPEA
Speaker: Richard L. Dumene – Texas Instruments
Speaker: Brent Rousseau, EE – Teradyne
Session Moderator: Stacy D. Ajouri, MSEE – Texas Instruments
Poster Presenter: Mieko Hirabayashi, PhD – Sandia
Poster Presenter: David Ducrocq – Teradyne
Poster Presenter: Tom Tran – Teradyne
Poster Presenter: Lauren Getz – Teradyne
Poster Presenter: Don Thompson, MA – R&D Altanova
All-In Pass
Wednesday, Jul 13
9:00am – 9:10am

Opening Remarks
Location: South Hall, Level 3, Room 302
Moderator: John Shelley – Teradyne
Moderator: Jeorge S. Hurtarte, PhD, MBA – Lam Research
All-In Pass
Wednesday, Jul 13
9:10am – 9:20am

Program Review
Location: South Hall, Level 3, Room 302
Moderator: Richard L. Dumene – Texas Instruments
Moderator: Alan Liao – FormFactor
All-In Pass
Wednesday, Jul 13
9:20am – 9:50am

2021 Best Paper Award and Presentation
Location: South Hall, Level 3, Room 302
Moderator: Paul Berndt – Microsoft Corporation
All-In Pass
Wednesday, Jul 13
9:50am – 10:50am

Modular ATE, the solution for testing Heterogeneous Integrated SOCs
Location: South Hall, Level 3, Room 302
Keynote Speaker: Mark Roos, MSEE, MBA – Roos Instruments
All-In Pass
Wednesday, Jul 13
10:50am

Session 1: High Speed and Mmwave
Location: South Hall, Level 3, Room 302
Session Moderator: Alan Liao – FormFactor
All-In Pass
Wednesday, Jul 13
10:50am – 11:15am

Session 1.1: 802.11BE wifi-7 4096 QAM 320 Mhz ATE Test Methodology
Location: South Hall, Level 3, Room 302
Speaker: Adrian Kwan – Advantest
All-In Pass
Wednesday, Jul 13
11:15am – 11:40am

Session 1.2: 5G Mmwave: Multi-site RF Probe Cards Enable Lower Cost-of-test in Mass Production
Location: South Hall, Level 3, Room 302
Speaker: Ryan Garrison, PMP – FormFactor
All-In Pass
Wednesday, Jul 13
11:40am – 12:05pm

Session 1.3: 5G Millimeter Wave over the Air Production Testing on ATE
Location: South Hall, Level 3, Room 302
Speaker: Roger C. Nettles, Jr., MSEE – Advantest
All-In Pass
Wednesday, Jul 13
12:05pm – 12:30pm

Session 1.4: Results of a Handler-based Solution for 60 GHz AiP DUT
Location: South Hall, Level 3, Room 302
Speaker: Brian C. Wadell, MEng EE – Teradyne
All-In Pass
Wednesday, Jul 13
1:30pm

Session 2: The Future of Test
Location: South Hall, Level 3, Room 302
Session Moderator: Stuart Pearce – AEM
All-In Pass
Wednesday, Jul 13
1:30pm – 1:55pm

Session 2.1 Analytical Techniques for ADCDAC Test Loadboard Design
Location: South Hall, Level 3, Room 302
Speaker: Noel del Rio, BSECE (Bachelor of Science in Electronics & Communication Engineering) – NXP Semiconductors
All-In Pass
Wednesday, Jul 13
1:55pm – 2:20pm

Session 2.2: ATE Instrument Modeling Speeds up Time to Market and Load Board Design
Location: South Hall, Level 3, Room 302
Speaker: Luca Fanelli, MA – SPEA
All-In Pass
Wednesday, Jul 13
2:20pm – 2:45pm

Session 2.3: Abstract Test and Specification Definition: Call for a Standard Test
Location: South Hall, Level 3, Room 302
Speaker: Richard L. Dumene – Texas Instruments
All-In Pass
Wednesday, Jul 13
2:45pm – 3:10pm

Session 2.4: Battery Management Systems (BMS) Device Testing and Trends for Automotive
Location: South Hall, Level 3, Room 302
Speaker: Brent Rousseau, EE – Teradyne
All-In Pass
Wednesday, Jul 13
3:10pm – 3:15pm

Closing Remarks & Day 1 Raffle
Location: South Hall, Level 3, Room 302
All-In Pass
Wednesday, Jul 13
3:15pm

Poster Session
Location: South Hall, Level 3, Room 302
Session Moderator: Stacy D. Ajouri, MSEE – Texas Instruments
All-In Pass
Wednesday, Jul 13
3:15pm – 5:00pm

Poster: Endpoint Detection for Through Silicon via Processing
Location: South Hall, Level 3, Room 302
Poster Presenter: Mieko Hirabayashi, PhD – Sandia
All-In Pass
Wednesday, Jul 13
3:15pm – 5:00pm

Poster: Explosive Demand for Discrete Wide Bandgap Devices Driving Next Generation Wafer Sort Solutions
Location: South Hall, Level 3, Room 302
Poster Presenter: Tom Tran – Teradyne
All-In Pass
Wednesday, Jul 13
3:15pm – 5:00pm

Poster: Increased Power in Ai—hyperscalers Drive Higher Current Power Management Solutions
Location: South Hall, Level 3, Room 302
Poster Presenter: Lauren Getz – Teradyne
All-In Pass
Wednesday, Jul 13
3:15pm – 5:00pm

Poster: Minimizing Execution Risk in Test Solution Development Projects with a Technical Project Lead
Location: South Hall, Level 3, Room 302
Poster Presenter: David Ducrocq – Teradyne
All-In Pass
Wednesday, Jul 13
3:15pm – 5:00pm

Poster: Optimizing Pcbs for 5G Load Boards
Location: South Hall, Level 3, Room 302
Poster Presenter: Don Thompson, MA – R&D Altanova
All-In Pass
Thursday, Jul 14
9:00am – 4:30pm

Test Vision Symposium: Test's Role in Uniting the Industry (Day 2 of 2)
Location: South Hall, Level 3, Room 302
Keynote Speaker: Gaurav Verma, MS, BTech – Qualcomm
Keynote Speaker: Abigail Malik – Qualcomm
Session Moderator: Junko Nakaya – Advantest
Speaker: Pouya Dastmalchi, PhD – FormFactor
Speaker: Charles Watson, PhD – ISE Labs
Speaker: Don Thompson, MA – R&D Altanova
Speaker: Mun Jun Leow – Teradyne
Session Moderator: Richard L. Dumene – Texas Instruments
Speaker: Stacy D. Ajouri, MSEE – Texas Instruments
Speaker: Wes Smith – Galaxy Semiconductor
Speaker: Devaraj Karthikeyan – HCL Technologies
Speaker: Martin Stadler – Teradyne
Panel Session Moderator: Jeorge S. Hurtarte, PhD, MBA – Lam Research
Panelist: David M. Fried, PhD – Lam Research
Panelist: Gaurav Verma, MS, BTech – Qualcomm
Panelist: Adam Smith – LitePoint
Panelist: Eli Roth – Teradyne
Panelist: Ravi Mahajan, PhD – Intel
Panelist: Mark Gerber – ASE
All-In Pass
Thursday, Jul 14
9:00am – 10:00am

Supply Chain Impact on Test and How to Partner for Better Success
Location: South Hall, Level 3, Room 302
Keynote Speaker: Gaurav Verma, MS, BTech – Qualcomm
Keynote Speaker: Abigail Malik – Qualcomm
All-In Pass
Thursday, Jul 14
10:00am

Session 3: Power Management and HW Design
Location: South Hall, Level 3, Room 302
Session Moderator: Junko Nakaya – Advantest
All-In Pass
Thursday, Jul 14
10:00am – 10:25am

Session 3.1: Probecard Challenges for Expanding Arrays of Fine Pad Pitch Device to Test Under Wide Temperature Range
Location: South Hall, Level 3, Room 302
Speaker: Pouya Dastmalchi, PhD – FormFactor
All-In Pass
Thursday, Jul 14
10:25am – 10:50am

Session 3.2: Latch-up Testing of High Power, Large Pin Count Devices on ATE
Location: South Hall, Level 3, Room 302
Speaker: Charles Watson, PhD – ISE Labs
All-In Pass
Thursday, Jul 14
10:50am – 11:15am

Session 3.3: Solving Socket Power Integrity; The Last Link in the Chain
Location: South Hall, Level 3, Room 302
Speaker: Don Thompson, MA – R&D Altanova
All-In Pass
Thursday, Jul 14
11:15am – 11:45am

Session 3.4: The Impact of User Experience (UX) on Post Silicon Validation
Location: South Hall, Level 3, Room 302
Speaker: Mun Jun Leow – Teradyne
All-In Pass
Thursday, Jul 14
1:00pm

Session 4: Data, Analytics, and Industry 4.0
Location: South Hall, Level 3, Room 302
Session Moderator: Richard L. Dumene – Texas Instruments
All-In Pass
Thursday, Jul 14
1:00pm – 1:25pm

Session 4.1: RITdb Tester Client: First Step to Smart Manufacturing at Test
Location: South Hall, Level 3, Room 302
Speaker: Stacy D. Ajouri, MSEE – Texas Instruments
All-In Pass
Thursday, Jul 14
1:25pm – 1:50pm

Session 4.2: On Omnivariate Approach to Reliability Improvement for Aerospace and Automotive Applications
Location: South Hall, Level 3, Room 302
Speaker: Wes Smith – Galaxy Semiconductor
All-In Pass
Thursday, Jul 14
1:50pm – 2:15pm

Session 4.3: Optimization of Backend Testing
Location: South Hall, Level 3, Room 302
Speaker: Devaraj Karthikeyan – HCL Technologies
All-In Pass
Thursday, Jul 14
2:15pm – 2:40pm

Session 4.4: Devops Best Practice Analysis for ATE Test Program Development
Location: South Hall, Level 3, Room 302
Speaker: Martin Stadler – Teradyne
All-In Pass
Thursday, Jul 14
3:00pm – 4:00pm

Panel Session: Uniting the Industry
Location: South Hall, Level 3, Room 302
Panel Session Moderator: Jeorge S. Hurtarte, PhD, MBA – Lam Research
Panelist: David M. Fried, PhD – Lam Research
Panelist: Gaurav Verma, MS, BTech – Qualcomm
Panelist: Adam Smith – LitePoint
Panelist: Eli Roth – Teradyne
Panelist: Ravi Mahajan, PhD – Intel
Panelist: Mark Gerber – ASE
All-In Pass
Thursday, Jul 14
4:00pm – 4:30pm

Closing Remarks, Day 2 Raffle & Symposium Raffle
Location: South Hall, Level 3, Room 302
All-In Pass