Partial discharge (PD) is a key insulation degradation mechanism in medium voltage (MV) power modules. The substrate should be free of partial discharge at the high isolated voltage to ensure reliability. Compared to the traditional single-layer substrate, stacking substrates is one attractive solution to increase insulation with the same thickness in MV applications. In this paper, the partial discharge performance of the stacked substrates is investigated and optimized by a middle-layer pattern structure. A 33% reduction of the electrical field can be achieved by choosing the optimized middle-layer pattern offsets. The effect on PD and thermal resistance with various middle layer pattern offsets are compared and analyzed. A middle-layer patterned stacked substrate fabricated and verified by the PD test at 12.8 kVrms.
.jpg "Xiaoling Li, MA photo")