D07.19 - 3.3 kV Low-Inductance Full SiC Power Module

In this paper, a high-performance packaging architecture is proposed to push the boundaries of high-speed and multichip 3.3kV SiC half-bridge power module. The proposed structure addresses the well-known low inductance and current sharing challenges. A compact and symmetrical layout, combined with embedded decoupling capacitors and integrated gate resistors, enables a 6.9nH low-inductance and balanced current-sharing packaging design to extract the best performance from high speed 3.3kV SiC devices. Furthermore, fabrication solutions to realize the proposed packaging architecture is developed. Following the recommended fabrication process, a 3.3kV 200A full SiC MOSFET half-bridge module has been assembled in a final size of 104mm×100mm×24mm. In addition, the static and dynamic performance validations of the final assembled modules are performed to demonstrate the benefits offered by the proposed packaging architecture.