The output-voltage ripple requirement of the processors point-of-load (POL) power supply can be as low as 1 mV, which is about one-tenth of the ripple for a typical design, putting a heavy design constraint on the synchronous buck converter. Synchronous-buck converters are available with several different control architectures, each having a unique method to ensure stability when designing for low ripple voltage. This session will compare and contrast three different control architectures, including externally-compensated voltage mode, constant on-time, and selectable-compensation current mode to achieve a 1-mV output voltage ripple from a 12-V input and 1-V output at 15 A.
