Xiang Lin

PhD Student
Virginia Polytechnic Institute and State University, United States

Xiang Lin received his B.S. degree in Electrical Engineering from Tsinghua University, China in 2015 and his M.S. degree in Electrical Engineering from the Tsinghua University in 2018. He is now a Ph.D. student at the Center for Power Electronics Systems (CPES) at the Virginia Polytechnic Institute and State University. His research interests include gate driver design for 10 kV SiC MOSFETs and medium voltage inverter design.

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Presentation(s):

• T03.8 - Design and Testing of a 13.8 kV/ 1.1MVA 3-Phase 5-Level Flying Capacitor Converter with 10 kV SiC MOSFETs

  Tuesday, March 21, 2023
  11:20 AM – 11:40 AM ET