For higher power applications several power-switches are used in parallel to form a lower ohmic resp. higher-power capable switch. Because of manufacturing tolerances, those switches are often required to be over-dimensioned to keep them all in their respective safe area of operation, for instance from a thermal standpoint. When using SiC-MOSFET, it can lead to high system cost overheads. To prevent this, one requires the ability to symmetrize the losses across all SiC-MOSFETs at all times. This presentation describes a solution based on an on-chip and inline characterization of some of the physical parameters of all those latter and the use of this data to balance the losses across them by adjusting their gate-drive control individually.
