Power delivery to high-speed digital loads has a growing set of challenges as dynamic loads demand power from DC to GHz frequencies while at the same time power rail voltages are dropping below 1 volt to drive 1000’s of amps. Design margins are narrowing and even the small parasitics of the PCB and package interconnects must be EM simulated to avoid late in the design noise ripple and EMI failures. This tutorial will take a deep dive into the Power Integrity world of designing with Target Impedance and takes it a step further to show how designing in the frequency domain can be expanded to “hack” the end-to-end power delivery eco-system.
This tutorial covers the basic entry level concepts of power integrity by analyzing power delivery in both the frequency domain and the time domain to show the advantages of designing for flat target impedance. Intermediate concepts will cover the latest in state-space behavioral modeling of switched mode power supplies. Learn how a few simple measurements of a regulator’s output impedance can enable a sophisticated behavioral model that enables simulation of an end-to-end power delivery ecosystem for even the most advanced multi-phase designs using wide bandgap SiC and GaN technologies.
