Output capacitance (COSS) loss (EDISS) is generated when the output capacitor of a power device is charged and discharged in its OFF state, which ideally should be a lossless process. This loss information is not included in the device datasheet but is crucial to device applications. Significant EDISS in GaN high-electron-mobility transistors (HEMTs) compromise their performance in high-frequency soft-switching converters. Among various GaN devices, the cascode GaN HEMT shows the largest EDISS. For the first time, this work unveils the physical origin of the EDISS in cascode GaN HEMTs with a method that reduces EDISS by up to 75%.
