This digest considers both continuous-time (CT) and discrete-time (DT) small-signal models (SSMs) in a synchronous buck converter. Using both the modelling approaches, (i) stability analysis and controller design are carried out; their (ii) advantages and shortcomings are highlighted using design case studies; (iii) a combined CT and DT design approach is identified to retain design simplicity and closed-loop stability in achieving fast transient performance. Further, a new digital PID controller design method is developed to achieve load-insensitive closed-loop output impedance, which results in superior load transient performance compared to a traditional loop-shaping approach. Both DVMC and DCMC case studies are considered, and analytical predictions are verified using simulation results. Finally, a buck converter prototype is made, and experimental results are presented to demonstrate stable design case studies for load transient and reference transient performance.
