This paper analyzes the thermal performance of silicon MOSFETs housed in surface-mount (SMD) packages both with top-side cooling and with bottom-side cooling. Through mathematic estimation of power losses coupled with thermal simulations, it has been shown how the top side cooling thermal dissipation approach is able to reduce the junction temperature and helps to lower devicesÂ’ power losses due to a smoother variation caused by temperature changes of the main silicon MOSFET parameters, such as RDS(on) and Vth level.
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